HEX
Server: LiteSpeed
System: Linux php-prod-1.spaceapp.ru 5.15.0-157-generic #167-Ubuntu SMP Wed Sep 17 21:35:53 UTC 2025 x86_64
User: xnsbb3110 (1041)
PHP: 8.1.33
Disabled: NONE
Upload Files
File: //lib/modules/5.15.0-133-generic/kernel/drivers/fpga/altera-pr-ip-core.ko
ELF>)@@$#GNU\-��U͝Np���kz&�m�bLinuxLinux�H��(H��P�����t|v��uz����u
���������1�H���H����HE΍�UH��I�H��VH���E���E����1�H���D�I��H��(H����UI��H��H����H�J�H��I��H��I��L�DH�7��H��L9�u�I����H��t'H��t9H��t'L������]��	�����D���H�C�����H�C�����C��H�%�����E1�릸���D�U��
H��AUATI��SH���H��tuI��H�D�Kf�I�t$PH��uI�4$L��H��L���H��H��tAL���[A\A]]�E��H�A��L��A��H��H��A���뗸��ff.���UH��(H���H�H�����H����B1�]�D�UH��AVI��AUL�oATI��S1����uT����CA9\$���I��(H��P����t�v˃�u7H��L���1�[A\A]A^]����w�����t"I�H�H��L����q�����	H���	H��1�H��H��H��H�������H��H��H�������H��L���������I��L��H�H���������I��L��H�H���������I��L��H�H���������alt_pr_registerpr errorcrc errorbad bitsunknown%s status=%d start=%d
altera_pr_ip_coreencountered error code %d (%s) in %s()
%s Partial Reconfiguration flag not set
%s Partial Reconfiguration already started
successful partial reconfiguration
timed out waiting for write to complete
drivers/fpga/altera-pr-ip-core.calt_pr_fpga_statealt_pr_fpga_write_initalt_pr_registerlicense=GPL v2description=Altera Partial Reconfiguration IP Coreauthor=Matthew Gerlach <matthew.gerlach@linux.intel.com>srcversion=3F3C29B3A4FC2AC9C706A53depends=fpga-mgrretpoline=Yintree=Yname=altera_pr_ip_corevermagic=5.15.0-133-generic SMP mod_unload modversions S��module_layout��)devm_fpga_mgr_create����__const_udelay�9�[__x86_return_thunk>�y�devm_fpga_mgr_register�-�_dev_err5>��_dev_info�m��__fentry__>:q�__dynamic_dev_dbg����devm_kmalloc�altera_pr_ip_coreGCC: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0GCC: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0��tt�� 
"� 9� R� j� � �� �� �� �� � 	!� 
?� a� z� 
@}��  �� @�� `�� /�ؾ�;��(;@��IT}��� 	H�� ;�*#�@�#%���� (���*�� ,�@� .�� � 0����
�
�!�"�,� 0�IT~@9� m��*��C� 2��M� 3���S@ �
!�$�
!�'�;�&�
!�;)�
!�+�
!�'�-�
!�/�R� a� f� @1��k� �S4�
�*6�

7�
���!�w� 9�
��!�;��(;�� ;�
��!�$'��� =�
��!�$'�;��(;�� ?�
IT}�S�� A�fpga_mgr_statesFPGA_MGR_STATE_UNKNOWNFPGA_MGR_STATE_POWER_OFFFPGA_MGR_STATE_POWER_UPFPGA_MGR_STATE_RESETFPGA_MGR_STATE_FIRMWARE_REQFPGA_MGR_STATE_FIRMWARE_REQ_ERRFPGA_MGR_STATE_WRITE_INITFPGA_MGR_STATE_WRITE_INIT_ERRFPGA_MGR_STATE_WRITEFPGA_MGR_STATE_WRITE_ERRFPGA_MGR_STATE_WRITE_COMPLETEFPGA_MGR_STATE_WRITE_COMPLETE_ERRFPGA_MGR_STATE_OPERATINGfpga_image_infoenable_timeout_usdisable_timeout_usconfig_complete_timeout_usfirmware_namefpga_manager_opsinitial_header_sizewrite_initwrite_sgwrite_completefpga_removefpga_managerref_mutexcompat_idmopsfpga_compat_idid_hid_lalt_pr_privalt_pr_fpga_statealt_pr_fpga_writealt_pr_fpga_write_completealt_pr_fpga_write_initalt_pr_registeraltera-pr-ip-core.ko�-z]
{#�2�?�X�	n���8�������0.��@8X`Hc@n ;�0B� �`��r���3B9�p�/<�J�@i>P`r}�����__UNIQUE_ID_srcversion124__UNIQUE_ID_depends123____versions__UNIQUE_ID_retpoline122__UNIQUE_ID_intree121__UNIQUE_ID_name120__UNIQUE_ID_vermagic119_note_9_note_8__kstrtab_alt_pr_register__kstrtabns_alt_pr_register__ksymtab_alt_pr_registeralt_pr_fpga_state__func__.0alt_pr_fpga_state.coldalt_pr_fpga_write__UNIQUE_ID_ddebug185.3alt_pr_ops__func__.2alt_pr_fpga_write_initalt_pr_fpga_write_init.cold__func__.1alt_pr_fpga_write_completealt_pr_fpga_write_complete.cold__UNIQUE_ID_license189__UNIQUE_ID_description188__UNIQUE_ID_author187devm_kmalloc__this_module__crc_alt_pr_register__dynamic_dev_dbg__fentry___dev_info_dev_errdevm_fpga_mgr_register__x86_return_thunk__const_udelaydevm_fpga_mgr_create'��������,+��������:+��������C��������IR
[	e{��)���������+���������+����������'��������0+��������g+��������q'���������#���������`�-���������*���������+���������@�$�&��������!'��������5,FMW+��������a'���������,���������n���(���������+��������������)���������
oo',o7 >(C)��������MQX _Xd)��������nQu�})��������������)��������������)������������	�)���������"
%�p  `hx ���`+9��/f�V ���*;@�$.symtab.strtab.shstrtab.note.gnu.build-id.note.Linux.rela.text.rela.text.unlikely.rela__ksymtab_gpl.rela__kcrctab_gpl__ksymtab_strings.rodata.str1.1.rodata.str1.8.rela__mcount_loc.rela.rodata.modinfo.rela.return_sites__versions.rela__jump_table.data.rela__dyndbg.gnu.linkonce.this_module.bss.comment.note.GNU-stack.BTF.gnu_debuglink@$.d0?�:@� !J�E@�!!^�Y@�$H!q�l@(%!	2��2�M�28�9(�@@%x!��� �@�%`!�(�;$�@&�!�`� ��
�@�&H!�
�
8
@8'`!@�@5�:0�XCSWXp�P""	���'g0��	*�H��
���0��1
0	`�He0	*�H��
1�o0�k0F0.1,0*U#Build time autogenerated kernel key.;��ڽ��>
R�i8B0�`0	`�He0
	*�H��
�C�:,�����gL^�f��<�Jm�V~�d?:[�Crq�|�̒���qd���[Q��)�I�$�}ZL�ˆ{��.�d�)�n�@����ZF�ֱ�F�@D�{�]s]93�5�F���_��
C�
#N��)$��J�-AQ2�C�-����Թ�[_�7�u��Ż�C�糦�W9�#�iU���%)ׅ�Q�I0�hW��c*~���ў�EX_�Ӌ�,4�̓�:�F�*um��͛���&�f�Ҍ[&���옴@�{�b��[}�[�h"��|d ��'˷�r����=`�NJ���O{*�NO��;�r��lT�`��g���֙5������kh
�g����:��r��~W��O���i�h[�i� `:yZ�਀����<��T�Jy�����s��[�*Q֐���&a0���¤|�O�A
�U+��ν��W��=6Q�^6�������n�~^�J&L��\����ִ �3x<.67�g�ª�6n���Z��B��~Module signature appended~